In a comparison between IBM Power and x86, it can be said that the best options between them will depend on their use. The x86 chips are intended for general use, have good scalability and high performance in almost all uses. On the other hand, Power chips are focused on using high-performance and high-performance servers. It has support to meet emerging demands, it has virtualization natively, with several hardware resources focused on virtualization, being the best possible choice for this type of work.
In addition, IBM Power is focused on the business line, having support plans for different business activities. Mainly focused on virtualization solutions, to meet massive work demands. In addition, the chips have resources to share jobs or pool resources, making multiple servers behave as one.
In this way, IBM Power becomes a fundamental part of the business plan of any company linked to technology or that needs a great scalability of resources to meet a massive demand for work. As well as mainly for the cloud computing area.
POWER8
Power8 was presented by IBM in 2014. There, IBM made several improvements over its previous version. The machines that were created with this chip, had the provision of 6 to 12 cores, in addition to a clock that varies from 2.5 GHz to 5 GHz. Power8 has 32 KB for instructions + 64 KB for data in L1 cache, 512 KB for SRAM type in L2 cache, 96 MB for eDRAM type in L3 cache and 128 MB for eDRAM type in L4 cache.
| Core | CPU | L1 cache | L2 cache | L3 cache | L4 cache |
|---|---|---|---|---|---|
| 6 to 12 | 2.5 GHz to 5 GHz | 64 KB + 32 KB | 512 KB | 96 MB | 128 MB |
When it comes to processors, memory is a fundamental resource. The cache memory is faster than the main memory (RAM memory), because of that, its size is fundamental for better processor performance. When compared to the previous version of the chip, the L3 cache memory had its size increased. This resulted in part to the higher performance of the processor compared to its predecessor.
Power8 has many more features than its x86 competitors and its predecessor, being more powerful than them. In addition, it has support for simultaneous multithreading with eight cores per thread (SMT-8), having a very high degree of parallelism.
POWER9
Power9 was presented by IBM in 2017. This version has improved core and hardware, the chip is smaller resulting in an optimization in energy consumption. The number of cores doubled to 24, the clock was set at 4 GHz. Power9 has 32 KB for instructions + 32 KB for data in L1 cache, 512 KB for SRAM type in L2 cache, 128 MB for eDRAM type in L3 cache.
| Core | CPU | L1 cache | L2 cache | L3 cache |
|---|---|---|---|---|
| 24 | 4 GHz | 32 KB + 32 KB | 512 KB | 128 MB |
The increase in the number of cores, plus the reduction in the size of the chip, with the increase of the L3 cache, optimizes and increases the processing power. Power9 has 1.5x better performance and 2x more memory than Power8.
Power9 has a greater acceleration than its previous versions, it had optimized the reading of memories of the type DDR4. Based on the acceleration, it was possible to reduce the cycle processes, the cost of hardware and increase efficiency.
The chip has been improved to have a higher bandwidth and low latency interface. This improvement was achieved through an interface created by NVIDIA, called NVLink. In addition, the architecture has also been optimized for emerging workloads. Improving your performance in carrying out work for high performance computing.
All of these improvements were made with the prospect of creating a more optimized processor to develop high-performance operations, from cloud computing, to large data centers and research.
POWER10
Power10 was presented by IBM in 2020. The chip has been enhanced for faster processing speed and greater capacity for intensive calculations. The number of cores can vary from 15 to 30, with a clock that varies from 4.5 GHz to 4 GHz. Power10 has 32 KB for instructions + 32 KB for data in the L1 cache, 2 MB type SRAM in the L2 cache, 128 MB type eDRAM in the L3 cache.
| Core | CPU | L1 cache | L2 cache | L3 cache |
|---|---|---|---|---|
| 15 to 30 | 3.5 GHz to 4 GHz | 32 KB + 32 KB | 2 MB | 128 MB |
Power10 is designed to achieve a high degree of performance in existing encryption standards and in future encryption standards. Power10 has implemented a mathematical matrix accelerator in its cores. This resulted in an AI 10x, 15x, 20x faster inference for FP32, BFloat16 and INT8 calculations, respectively, compared to Power9.
Several changes have been made compared to its predecessor. Power10 had its reading hardware optimized, support for DDR5 memories was added, the L2 cache memory had its capacity increased, in addition to the chip which had its size reduced. These characteristics mean that the Power10 chip has increased performance and its optimization prepares the chip to support the newest technologies developed.
IBM implemented PowerAXON on Power10. It has the ability to share the main memory of a Power10 server with other Power10 servers. This feature can be used to allow a set of small machines to become a large machine with great processing power.
With all the features of previous versions optimized, with the addition of innovative features and with increased processing power and capacity, make this processor the most powerful that IBM has ever created. Perfect for data analysis jobs, cloud computing, high performance programming and among other jobs that need up-to-date and powerful machines.
OpenPower Lab does not have Power10 servers within its collection.
